Philips Q552.2L Specifiche Scaricare il pdf (Pagina 51)

Circuit Descriptions

EN 51Q552.2L LA 7.

2011-Jul-15

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Figure 7-4 Front-End block diagram Brazil region

7.5 Front-End DVB-S(2) reception

The Front-End for the DVB-S(2) application consist of the

following key components:

• Satellite Tuner; I

C address 0xC6 (bridged via channel

decoder)

• Channel decoder; I

C address 0xD0

• LNB switching regulator; I

C address 0x14

• Amplifier

• PNX855xx SoC TV processor with integrated DVB-T and

DVB-C channel decoder and analogue demodulator.

Below find a block diagram of the front-end application for

DVB-S(2) reception.

Figure 7-5 Front-End block diagram DVB-S(2) reception

This application supports the following protocols:

• Polarization selection via supply voltage (18V = horizontal,

13V = vertical)

• Band selection via “toneburst” (22 kHz): tone “on” = “high”

band, tone “off” = “low” band

• Satellite (LNB) selection via DiSEqC 1.0 protocol

• Reception of DVB-S (supporting QPSK encoded signals)

and DVB-S2 (supporting QPSK, 8PSK, 16APSK and

32APSK encoded signals), introducing LDPC low-density

parity check techniques.

7.6 HDMI

In this platform, the Silicon Image Sil9x87 HDMI multiplexer is

implemented. Refer to figure 7-6 HDMI input configuration

for

the application.

Figure 7-6 HDMI input configuration

The following multiplexers can be used:

• Sil9187A (does not support “Instaport” technology for fast

switching between input signals)

• Sil9287B (supports “Instaport” technology for fast

switching between input signals).

The hardware default I

C addresses are:

• Sil9187A: 0xB0/0xB2 (random: software workaround)

• Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:

• +5V detection mechanism

• Stable clock detection mechanism

• Integrated EDID

• RT control

• HPD control

• Sync detection

• TMDS output control

• CEC control

• EDID stored in Sil9x87, therefore there are no EDID pins

on the SSB.

7.7 Video and Audio Processing - PNX855xx

The PNX855xx is the main audio and video processor (or

System-on-Chip) for this platform. It has the following features:

• Multi-standard digital video decoder (MPEG-2, H.264,

MPEG-4)

• Integrated DVB-T/DVB-C channel decoder

• Integrated CI+

• Integrated motion accurate picture processing (MAPP2)

• High definition ME/MC

• 2D LED backlight dimming option

• Embedded HDMI HDCP keys

• Extended colour gamut and colour booster

• Integrated USB2.0 host controller

• Improved MPEG artefact reduction compared with

PNX8543

• Security for customers own code/settings (secure flash).

The TV550 combines front-end video processing functions,

such as DVB-T channel decoding, MPEG-2/H.264 decode,

analog video decode and HDMI reception, with advanced

back-end video picture improvements. It also includes next

generation Motion Accurate Picture Processing (MAPP2). The

MAPP2 technology provides state-of-the-art motion artifact

reduction with movie judder cancellation, motion sharpness

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